As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Information handling systems often use an array of physical storage resources, such as a Redundant Array of Independent Disks (RAID), for example, for storing information. Arrays of physical storage resources typically utilize multiple disks to perform input and output operations and can be structured to provide redundancy which may increase fault tolerance. Other advantages of arrays of physical storage resources may be increased data integrity, throughput and/or capacity. In operation, one or more physical storage resources disposed in an array of physical storage resources may appear to an operating system as a single logical storage unit or “logical unit.” Implementations of physical storage resource arrays can range from a few physical storage resources disposed in a server chassis, to hundreds of physical storage resources disposed in one or more separate storage enclosures.
In addition, implementation of physical storage resource arrays may include one or more batteries. Such batteries may serve as a backup power source in the event of a failure of a main power source of a storage resource array or one its components. For example, in a power outage, batteries may provide backup power to storage resources for a time sufficient to allow for the power outage to end.
As another example, batteries may be used to provide backup power to write caches associated with storage resources. To illustrate, when data from an information handling system is to be written to a storage resource, rather than immediately store the data onto a storage resource's persistent storage (e.g., hard disk drives), the data may instead be stored in a write cache associated with the storage resource and a signal may be communicated to the information handling system issuing the write command that the data has been successfully stored. This may significantly speed up the acknowledgment back to the information handling system that the data has been successfully stored, allowing the information handling system to proceed to other tasks. Then, when it is convenient for the appropriate storage resource to do so, the data in the designated write cache may be flushed to the persistent storage area of the storage resource, where it becomes “permanently” stored. However, because many write caches are implemented as volatile memory (e.g., memory which loses its data when power is removed), battery backup power may be used to maintain data stored in write caches until such time as main power can be restored and the data flushed to persistent storage.
In many applications, batteries used in connection with storage arrays are managed remotely. As an illustration, batteries are often physically located substantially locally to the storage resources and/or write caches to which they provide backup power, while the management of the batteries (e.g., the detection of battery presence, battery voltage, battery capacity and charging of the batteries) is performed at a location remote from the batteries. For example, as shown in FIG. 1, a storage controller for a storage array may include a charger 102 located remotely from battery pack 112. Charger 102 may be coupled to battery pack 112 via a cable 110. Charger 102 may include circuitry to sense a reference voltage VREF (e.g., via REF_IN pin 106) indicative of the voltage of battery 114, and then charge or supply electrical current to battery 114 (e.g., via CHRG_OUT pin 104) if the VREF is below a specified threshold voltage.
However, one disadvantage of remotely managing the charging of a battery is that the voltage sensed by the sensing circuitry may be substantially different than the voltage actually present at the battery. This may occur as a result of parasitic impedance of the cable coupling the sensing circuitry to the battery, leading to a voltage drop across the cable. For example, in FIG. 1, CHRG_OUT pin 104 may need to supply a sizable electrical current to charge battery 114. Due to the length of cable 110, cable 110 may have a significant parasitic impedance and the electrical current may induce a significant voltage drop across cable 110. Accordingly, the voltage VA (and accordingly the voltage VREF that tracks VA) would differ significantly from the voltage present at the positive terminal of battery 114. In some applications, this voltage drop may be as much as 10-20% of the maximum voltage of the battery, and thus can lead to inconsistent readings of battery voltage which may in turn negatively effect charger performance.
Numerous solutions to account for the voltage drop across the cable have been attempted, but most still have significant disadvantages and problems. For example, in the approach depicted in FIG. 2, an additional sense point is added to mitigate, but not completely eliminate, problems associated with parasitic cable impedance. In FIG. 2, resistance values of resistors 208a, 208b, and 216 may be selected such that minimal current flows through these resistors when a battery 214 is present. Accordingly, when battery 214 is present, most of the current in the circuit will flow from CHRG_OUT pin 204, through cable 210a, and to battery 214. Because a minimal amount of current flows through resistor 216, the same minimal amount of current will also flow through cable 210b. Because of this minimal current flow, the voltage drop across cable 210b will also be minimal regardless of the parasitic impedance of cable 210b. Accordingly, the voltage at node VREF should approximately equal the voltage at node VB. However, as in the approach depicted in FIG. 1, the voltage VA would differ significantly from the voltage present at the positive terminal of battery 214 because of the voltage drop across cable 210a. The voltage VA would have the effect of pulling up the voltage VREF away from the voltage VB. Thus, while the approach in FIG. 2 mitigates the effect of the parasitic impedance of cable 210a, it does not completely eliminate it.
Another solution practically eliminates the effect of the voltage drop across cable 210a, but this solution introduces problems of its own. Under such a solution, the approach of FIG. 2 may be used, but with resistor 208a removed. Without resistor 208a, the voltage VA would not be able to pull up the voltage VREF from the voltage VB. However, this solution is not practical. In the event a battery pack 212 is not present the voltage VREF would be pulled to ground voltage. Because ground voltage would likely be lower than the threshold voltage needed to indicate a fully-charged battery, a ground voltage received on REF_IN pin 206 may cause one or more problems. As an example, a ground voltage may incorrectly indicate to charger 202 circuitry that a battery is present and requires charging. However, without a battery present, the charger would drive current to an open circuit. This could result in charger instability and damage to the charger. Accordingly, resistor 208a may be needed in the solution set forth in FIG. 2 in order to provide a “dummy” VREF voltage in the event no battery pack 212 is present, as well as to provide a path for CHRG_OUT pin 204 current when no battery pack 212 is present.